LG Electronics, Inc. v. Bizcom Electronics, Inc.

453 F.3d 1364 | Fed. Cir. | 2006

Before MICHEL, Chief Judge, NEWMAN, and MAYER, Circuit Judges. MAYER, Circuit Judge.

LG Electronics, Inc. (“LGE”) appeals from the final judgment of the United States District Court for the Northern District of California, which granted summary judgment of noninfringement of U.S. Patent Nos. 4,918,645; 5,077,733; 4,939,641; 5,379,379; and 5,892,509 in favor of Bizcom Electronics, Inc.; Compal Electronics, Inc.; Sceptre Technologies, Inc.; First International Computer, Inc.; First International Computer of America, Inc.; Q-Lity Computer, Inc.; Quanta Computer, Inc.; Quanta Computer USA, Inc.; and Everex Systems, Inc. (collectively “defendants”). LG Elecs., Inc. v. Ausustek Computer, Inc., Nos. C-01-1375, -1552, -1594, -2187 (N.D. Cal. Jan. 31, 2005); LG Elecs., Inc. v. Ausustek Computer, Inc., Nos. C-01-1375, -1594, -2187, -1552 (N.D. Cal. Nov. 30, 2004); LG Elecs., Inc. v. Ausustek Computer, Inc., 248 F. Supp. 2d 912 (N.D. Cal. 2003); LG Elecs., Inc. v. Ausustek Computer, Inc., Nos. C-01-326, -1375, -1594, - 2187, -1552 (N.D. Cal. Aug. 20, 2002) (“Intel I”). LGE also appeals and defendants cross appeal various claim construction rulings by the trial court. LG Elecs., Inc. v. Ausustek Computer, Inc., Nos. C-01-00326, -01375, -01594, -02187, -01552 (N.D. Cal. Aug. 20, 2002) (“Claim Construction Order”). Defendants First International Computer, Inc.; First International Computer of America, Inc.; Q-Lity Computer, Inc.; Quanta Computer, Inc.; and Quanta Computer USA, Inc. also cross appeal the denial of summary judgment based on their implied license defense. LG Elecs., Inc., 248 F. Supp. 2d 912.

Background LGE is the owner of patents relating to personal computers, including U.S. Patents Nos. 4,918,645 (disclosing systems and methods that increase the bandwidth efficiency of a computer’s system bus); 5,077,733 (claiming, in relevant part, a method that controls the access of a device to a bus shared by multiple devices); 4,939,641 (claiming, in relevant part, a system for ensuring that outdated data is not retrieved from memory); 5,379,379 (claiming a system and method for ensuring that outdated data is not retrieved from memory); and 5,892,509 (claiming networked computers capable of sharing certain video images). LGE sued defendants alleging infringement of these patents.

Defendants purchase microprocessors and chipsets from Intel or its authorized distributors and install them in computers. Intel is authorized to sell these products to defendants under an agreement with LGE. However, pursuant to this agreement, Intel notified defendants that, although it was licensed to sell the products to them, they were not authorized under that agreement to combine the products with non-Intel products. LGE brought suit against defendants, asserting that the combination of microprocessors or chipsets with other computer components infringes LGE’s patents covering those combinations. LGE did not assert patent rights in the microprocessors or chipsets themselves.

After construing the patent claims, the trial court granted summary judgment of noninfringement of each patent. It determined that there was no implied license to any defendant, but that, with the exception of the ’509 patent, LGE’s rights in any system claims were exhausted. The court also found that LGE was contractually barred from asserting infringement of the ’509 patent against defendants. It found the ’645, ’733, and ’379 patents not infringed after applying its claim construction to the accused methods and devices. We have jurisdiction under 28 U.S.C. § 1295(a)(1).

Discussion “We review the trial court's grant of summary judgment without deference, reapplying the same standard as the trial court.” Lacavera v. Dudas, 441 F.3d 1380 (Fed. Cir. 2006) (citing Star Fruits S.N.C. v. United States, 393 F.3d 1277, 1281 (Fed. Cir. 2005)). Summary judgment is appropriate “if the pleadings, depositions, answers to interrogatories, and admissions on file, together with the affidavits, if any, show that there is no genuine issue as to any material fact and that the moving party is entitled to a judgment as a matter of law.” Fed. R. Civ. P. 56(c). We review claim construction de novo. Cybor Corp. v. FAS Techs., Inc., 138 F.3d 1448, 1456 (Fed. Cir. 1998) (en banc). I. Implied License [1]

“In a suit for patent infringement, the burden of proving the establishment of an implied license falls upon the defendant.” Bandag, Inc. v. Al Bolser's Tire Stores, Inc., 750 F.2d 903, 924 (Fed. Cir. 1984) (citing Bassick Mfg. Co. v. Adams Grease Gun Corp., 54 F.2d 285, 286 (2d Cir. 1931)). To prevail, defendants were required to establish that the products have no noninfringing uses and that “the circumstances of the sale . . . ‘plainly indicate that the grant of a license should be inferred.’” Met-Coil Sys. Corp. v. Korners Unlimited, Inc., 803 F.2d 684, 686 (Fed. Cir. 1986) (quoting Bandag, Inc., 750 F.2d at 925). The trial court found, and we agree, that Intel’s sales of its licensed products to defendants do not warrant the inference of a license with respect to the asserted patents. Regardless of any noninfringing uses, Intel expressly informed them that Intel’s license agreement with LGE did not extend to any of defendants’ products made by combining an Intel product with non-Intel products. In light of this express disclaimer, no license can be implied. II. Patent Exhaustion

The patents asserted by LGE do not cover the products licensed to or sold by Intel; they cover those products when combined with additional components. The trial court, nevertheless, found that the system claims in all patents except the ’509 patent were exhausted, but that the exhaustion doctrine did not apply to the method claims. We reverse the trial court’s holding with respect to the system claims and affirm with respect to the method claims.

It is axiomatic that the patent exhaustion doctrine, commonly referred to as the first sale doctrine, is triggered by an unconditional sale. See Mitchell v. Hawley, 83 U.S. 544, 547 (1873). “[A]n unconditional sale of a patented device exhausts the patentee's right to control the purchaser’s use of the device thereafter. The theory behind this rule is that in such a transaction, the patentee has bargained for, and received, an amount equal to the full value of the goods. This exhaustion doctrine, however, does not apply to an expressly conditional sale or license. In such a transaction, it is more reasonable to infer that the parties negotiated a price that reflects only the value of the ‘use’ rights conferred by the patentee.” B. Braun Med. Inc. v. Abbott Labs., 124 F.3d 1419, 1426 (Fed. Cir. 1997) (discussing Mallinckrodt, Inc. v. Medipart, Inc., 976 F.2d 700, 708 (Fed. Cir. 1992)) (emphasis added and citations omitted).

There are two sales at issue here. First, prior to this litigation, LGE granted Intel a license covering its entire portfolio of patents on computer systems and components. This transaction constitutes a sale for exhaustion purposes. See United States v. Masonite Corp., 316 U.S. 265, 278 (1942). Second, with LGE’s authorization, Intel sold its microprocessors and chipsets to each defendant. Notably, this sale involved a component of the asserted patented invention, not the entire patented system.

The trial court issued two orders on patent exhaustion. The first is unclear about which sale the court relied upon in holding LGE’s system patent rights exhausted with respect to defendants, but we understand it to be LGE’s license to Intel. Intel I at 9-10. However, the second order, which reaffirmed the first, clearly relied on Intel’s sale of its microprocessors and chipsets to defendants as the exhausting sale. LG Elecs., Inc., 248 F. Supp. 2d at 917. In finding the unconditional sale requirement satisfied, the court concluded that although “LGE is entitled to impose conditions on the sale of the essential components of its patented products does not mean that it actually did so here. To the contrary, defendants’ purchase of the microprocessors and chipsets from Intel was unconditional, in that defendants’ purchase of the microprocessors and chipsets from Intel was in no way conditioned on their agreement not to combine the Intel microprocessors and chipsets with other non-Intel parts and then sell the resultant products.” Id. at 916-17. We disagree.

The LGE-Intel license expressly disclaims granting a license allowing computer system manufacturers to combine Intel’s licensed parts with other non-Intel components. Moreover, this conditional agreement required Intel to notify its customers of the limited scope of the license, which it did. Although Intel was free to sell its microprocessors and chipsets, those sales were conditional, and Intel’s customers were expressly prohibited from infringing LGE’s combination patents. Cf. N.Y. U.C.C. Law § 2-202 (allowing contracts to be supplemented by consistent additional terms unless the writing is intended to be complete and exclusive). The “exhaustion doctrine . . . does not apply to an expressly conditional sale or license,” B. Braun Med. Inc., 124 F.3d at 1426, so LGE’s rights in asserting infringement of its system claims were not exhausted.

Conversely, the trial court declined to find LGE’s asserted method claims exhausted. Several defendants contest this ruling on cross-appeal, and we reject their challenge. Based on the above reasoning, even if the exhaustion doctrine were applicable to method claims, it would not apply here because there was no unconditional sale. However, the sale of a device does not exhaust a patentee’s rights in its method claims. Glass Equip. Dev., Inc. v. Besten, Inc., 174 F.3d 1337, 1341 n.1 (Fed. Cir. 1999) (citing Bandag, Inc., 750 F.2d 903, 924 (Fed. Cir. 1984)). The court was correct. III. ’509 Patent

The ’509 patent discloses a system of networked computers capable of sharing video images. The trial court’s exhaustion ruling did not extend to the ’509 patent; instead it granted summary judgment of noninfringement on the ground that LGE was contractually barred from asserting infringement of the ‘509 patent claims against defendants. This conclusion was based on a non-assertion provision in a contract between LGE and Microsoft, which barred LGE from suing “[Microsoft], its suppliers, their subsidiaries, or their licensees.” [2] The court concluded that defendants were included within this class of parties. Because a genuine issue of material fact exists as to whether defendants fall within the protection of this contract provision, we reverse the trial court’s grant of summary judgment of noninfringement.

In determining whether LGE is barred under the LGE-Microsoft agreement from suing defendants for infringement, the dispositive issue is whether each defendant is a Microsoft licensee. Defendants are third-party installers (“TPIs”) that assemble computers for original equipment manufacturers (“OEMs”). The OEMs have licenses with Microsoft, and it is undisputed that defendants were authorized to install Microsoft’s products on the systems they manufacture. It is unclear, however, whether defendants’ authorization was under “have made” rights of the OEMs’ agreements with Microsoft, whereby the OEM would be authorized to use a third party for completing work on its behalf, or whether such authorization was as a sublicensee. If the work was authorized solely by an OEM’s have made rights, and if that OEM were not authorized to grant sublicenses under its agreement with Microsoft, then defendants may not be “licensees” protected by the LGE-Microsoft non-assertion provision. Cf. Cyrix Corp. v. Intel Corp., 77 F.3d 1381, 1388 (Fed. Cir. 1996) (distinguishing “have made rights” from sublicenses). A genuine issue of material fact exists as to each defendant’s status.

On remand, defendants must establish that LGE is contractually barred from pursuing infringement claims against them. See McCoy v. Mitsuboshi Cutlery, Inc., 67 F.3d 917, 920 (Fed. Cir. 1995). Although the parties have relied on the LGE-Microsoft agreement in arguing whether or not defendants are Microsoft licensees, that agreement is not the proper focus. It is the agreements between each OEM and each defendant, and those between Microsoft and the OEM hiring each defendant that matter.

The record indicates that FIC was both a TPI and an OEM. As an OEM, it had a license from Microsoft, and therefore falls squarely within the scope of protected parties under the non-assertion provision. However, the contract provision only bars suit against Microsoft licensees for infringement “on account of” the manufacture, use, sale, or distribution of Microsoft’s products. LGE does not dispute that there is no infringement absent the Microsoft software in the accused devices, since the software satisfies some, but not all, limitations of the ’509 patent claims. However, LGE argues that any infringement was not “on account of” the use of Microsoft products. The trial court rejected this argument, essentially reading the “on account of language” as a “but for” requirement.

The “on account of” language, however, is not susceptible of only one interpretation. According to the Supreme Court in construing this phrase in an unrelated statute, “the phrase ‘on account of’ does not unambiguously define itself.” O’Gilvie v. United States, 519 U.S. 79, 82 (1996) (construing 26 U.S.C. § 7405(b)). Here, too, the degree of causation required by this contract term is unclear. Because proper construction requires factual considerations, we reverse the trial court’s grant of summary judgment. Scott Galvanizing, Inc. v. Nw. EnviroServices, Inc., 844 P.2d 428, 433 (Wash. 1993); see also BNC Mortgage, Inc. v. Tax Pros, Inc., 46 P.3d 812, 819-820 (Wash. Ct. App. 2002) (“If the contract's written words have two or more reasonable meanings (i.e., are ‘ambiguous’) when read in context, a court may not grant summary judgment or direct a verdict; instead, it must put the case to a trier of fact.”) (citations omitted).

The parties also dispute the trial court’s construction of several claim terms in the ’509 patent. Claim 35, from which asserted claims 45 and 51 depend, contains the limitation of “a control unit for controlling the communication unit, wherein the control unit comprises a [central processing unit (“CPU”)] and a partitioned memory system.” LGE contends that the trial court erroneously construed the term “control unit” as a means-plus-function limitation.

“‘[A] claim term that does not use ‘means’ will trigger the rebuttable presumption that § 112 ¶ 6 does not apply.’” Lighting World, Inc. v. Birchwood Lighting, Inc., 382 F.3d 1354, 1358 (Fed. Cir. 2004) (quoting CCS Fitness, Inc. v. Brunswick Corp., 288 F.3d 1359, 1369 (Fed. Cir. 2002)). This presumption can be rebutted “by showing that the claim element recite[s] a function without reciting sufficient structure for performing that function.” Watts v. XL Sys., 232 F.3d 877, 880 (Fed. Cir. 2000) (citing Rodime PLC v. Seagate Tech., Inc., 174 F.3d 1294, 1302 (Fed. Cir. 1999)). However, the presumption “is a strong one that is not readily overcome.” Lighting World, Inc., 382 F.3d at 1358.

Here, the claim limitation at issue does not use the term “means,” and the presumption against means-plus-function treatment is not overcome. The claim itself provides sufficient structure, namely “a CPU and a partitioned memory system,” for performing the stated function, “controlling the communication unit.” See id. at 1359-60. Thus, the proper construction of “control unit” is “a combination comprising a CPU and a partitioned memory system capable of controlling the communication unit.”

Defendants contend on cross appeal that the trial court also misconstrued claim 35 by not requiring multiple displays. In particular, they contend that the preamble term “image processing system” requires multiple displays in light of the prosecution history. However, the claim language does not include this limitation, and the trial court properly refused to read it into the claim. Moreover, the body of the claim provides for “a display.” KCJ Corp. v. Kinetic Concepts, Inc., 223 F.3d 1351, 1356 (Fed. Cir. 2000) (“This court has repeatedly emphasized that an indefinite article ‘a’ or ‘an’ in patent parlance carries the meaning of ‘one or more’ in open-ended claims containing the transitional phrase ‘comprising.’”) (citations omitted). Claim differentiation also supports the trial court’s construction because dependent claim 38 adds the limitation of the “image processing system further compris[ing] at least first and second displays coupled to the CPU of the image processing system.” See Phillips v. AWH Corp., 415 F.3d 1303, 1314 (Fed. Cir. 2005) (“Differences among claims can also be a useful guide in understanding the meaning of particular claim terms.” (citing Laitram Corp. v. Rexnord, Inc., 939 F.2d 1533, 1538 (Fed. Cir. 1991))).

The prosecution history relied upon by defendants does not compel a different construction. The patentee made arguments during prosecution to distinguish claims in the parent application to the ’509 patent, which expressly required multiple displays, over the prior art. These arguments, however, do not compel reading a multiple display limitation into the ’509 patent, which does not expressly require multiple displays. See Elkay Mfg. Co. v. Ebco Mfg. Co., 192 F.3d 973, 980 (Fed. Cir. 1999) (“When multiple patents derive from the same initial application, the prosecution history regarding a claim limitation in any patent that has issued applies with equal force to subsequently issued patents that contain the same claim limitation.” (emphasis added)). IV. ’645 patent

The ’645 patent discloses a digital computer system that has devices called agents that are interconnected by a system bus. The claimed system and corresponding method require one agent, the requesting agent, to request access to a memory stored on another agent, called the replying agent. The requested data is organized as a matrix of memory cells, having column and row coordinates. The “memory controller” of the replying agent processes the request from the requesting agent by asserting a plurality of memory address control signals, including at least one row address strobe (“RAS”) signal and one column address strobe (“CAS”) signal. This “page mode memory access” operates by the assertion of an entire row of data followed by the assertion and deassertion of multiple column addresses. By the RAS signal accessing an entire row followed by the assertion and deassertion of particular column addresses, this page mode memory access differs from the conventional memory access, which separately accessed each memory cell by asserting its individual row address and column address. In the claimed invention, after the data is accessed, it is then transferred to the requesting agent over the system bus.

LGE alleged infringement of system claims 1-4 and 6 and method claims 12-15 and 17. The trial court granted summary judgment of noninfringement of all asserted claims, concluding that the RAS/CAS signals in defendants’ devices did not travel over the system bus. However, the ’645 patent claims do not contain a limitation requiring that the strobe signals travel over the system bus. Moreover, the specification does not suggest that the strobe signals must travel over the system bus. To the contrary, Figure 5 shows an embodiment of the invention in which the strobe signals travel only internally within the replying agent, not across the system bus.

In an attempt to impose this limitation on the claims, defendants rely on the prosecution history. While the prosecution history is relevant to claim construction, “it often lacks the clarity of the specification and thus is less useful for claim construction purposes.” Phillips, 415 F.3d at 1317 (citations omitted). Here, defendants point to statements in the prosecution history that the prior art does not teach “a page mode type of access over a system bus from a requesting agent to a replying agent.” While we agree that this and other statements in the prosecution history lack ideal clarity, we do not find that they rise to the level of disclaiming or limiting the scope of the express claim language. Therefore, the trial court erred in construing the ’645 claims to require the RAS and CAS signals to travel over the system bus. In addition, there is a genuine issue of material fact as to whether the accused devices and methods utilize strobe signals. LGE’s expert submitted an affidavit that the accused devices employ strobe signals, which precludes summary judgment.

In the alternative, defendants contend that LGE failed to present evidence of an “end of access signal.” This signal, which is required by the claims, is generated by the requesting agent and received by a detecting means coupled to the memory address control signal asserting means. When the detection means receives this end of access signal, the operation is halted. Defendants contend that LGE failed to establish the existence of a genuine issue of material fact as to whether the accused devices contain this limitation. However, the trial court did not consider this argument, and we will not address this factual issue in the first instance.

LGE also argues that the trial court’s construction of the “requesting agent” claim limitation was in error. The court construed this term as “a device coupled to the system bus that requests access to a memory located on a replying agent.” Claim Construction Order at 6-9. LGE contends that an industry standard, which was incorporated into the specification by reference, provides the proper claim construction of this term. ’645 patent col. 3 ll. 51-56. [3] The incorporated standard explicitly defines the term “requesting agent” as “an agent that has entered into the arbitration function for bus access.” Defendants contend, however, that the patentee did not act as its own lexicographer by incorporating this industry standard by reference. The trial court did not accept LGE’s proposed construction, concluding that it was a preferred embodiment and did not limit the claimed invention. The difference in the two constructions is temporal: LGE’s proposed construction defines an agent as a requesting agent only when it is engaged in arbitration for bus access, whereas the trial court’s construction defines a requesting agent regardless of whether it is actively engaged in arbitration.

We have recognized that the “[i]nterpretation of descriptive statements in a patent's written description is a difficult task, as an inherent tension exists as to whether a statement is a clear lexicographic definition or a description of a preferred embodiment.” E-Pass Techs., Inc. v. 3COM Corp., 343 F.3d 1364, 1369 (Fed. Cir. 2003). “Thus in determining whether a statement by a patentee was intended to be lexicographic, it is important to determine whether the statement was designed to define the claim term or to describe a preferred embodiment.” Id. We agree with the trial court and defendants that the patentee did not act as its own lexicographer here. Instead, the industry standard was incorporated as a preferred embodiment. The specification makes this clear by explaining that “[a]lthough the method and apparatus of the invention will be described herein in the context of a Multibus II environment, it should

Performance 32-Bit Bus Standard P1296” which was produced by the IEEE microprocessor standards committee P1296 working group, Jun. 20, 1986, draft 2.0, the disclosure of which is incorporated herein in its entirety.

’645 patent col. 3 ll. 45-56. be appreciated that the invention may be practiced in many digital computer systems having a bus for transferring data between at least two agents interconnected upon the bus.” ’645 patent col. 3 ll. 45-49.

Chimie v. PPG Industries, Inc., 402 F.3d 1371 (Fed. Cir. 2005), does not compel a different result. In Chimie, we were confronted with the claim terms “dust-free and non-dusting.” After concluding that these terms were relative and could only be understood by comparison with the prior art, we concluded that only one standard was disclosed in the specification for making such a comparison. We limited these claim terms to the disclosed standard. Here, however, there is no relative term that cannot be understood without reference to an industry standard.

But, this does not end our inquiry. The proper claim construction is “the ordinary and customary meaning . . . that the term would have to a person of ordinary skill in the art in question at the time of the invention, i.e., as of the effective filing date of the patent application.” Phillips, 415 F.3d at 1313 (citations omitted). “When prior art that sheds light on the meaning of a term is cited by the patentee, it can have particular value as a guide to the proper construction of the term, because it may indicate not only the meaning of the term to persons skilled in the art, but also that the patentee intended to adopt that meaning.” Arthur A. Collins, Inc. v. N. Telecom Ltd., 216 F.3d 1042, 1045 (Fed. Cir. 2000). Although we have concluded that the patentee did not expressly adopt the definition of “requesting agent” in the incorporated industry standard, that standard remains relevant in determining the meaning of the claim term to one of ordinary skill in the art at the time the patent application was filed, and it is treated as intrinsic evidence for claim construction purposes, see V-Formation, Inc. v. Benetton Group SpA, 401 F.3d 1307, 1311 (Fed. Cir. 2005) (“This court has established that ‘prior art cited in a patent or cited in the prosecution history of the patent constitutes intrinsic evidence.’”) (citations omitted).

Here, the trial court erred by failing to give proper weight to the incorporated industry standard; it failed to consider the standard as intrinsic evidence of the meaning to one of ordinary skill in the art as of the filing date. After considering the standard, in addition to the patent claims and specification, we conclude that LGE’s proffered definition based on the standard is correct. Thus, we construe “requesting agent” as “an agent that has entered into the arbitration function for bus access.” This construction is entirely consistent with the specification, which provides that “at one time in the operation of the system . . . the requesting agent 12 may be a replying agent, and that the replying agent 16 may at that time be a requesting agent.” ’645 patent col.4 ll. 8-11. This language makes clear that the classification of an agent depends upon the function the agent is performing at any given time, i.e., whether it is engaged in arbitration at a given moment. V. ’733 patent

The ’733 patent discloses a rotating priority system that provides multiple computer devices alternating access to a system bus, which is the pathway over which the various components of a computer system transmit data. This system addresses the problem of “hogging,” in which one component of a computer system monopolizes access to the system bus. The asserted claims of the ’733 patent, method claims 15- 19, [4] establish a rotating priority system that limits each device’s access to the bus. In particular, claim 15 sets forth two steps of the method as “counting a number of accesses by the device to the bus” and then “in response to a predetermined number of accesses to the bus, giving another [device] the highest priority.” The trial court granted summary judgment of noninfringement of the ’733 patent, holding that the claim limitation of “counting a number of accesses by the device to the bus” was not practiced in the accused method.

The court construed the claim limitation “counting a number of accesses” as “counting the number of times a device gains use of the bus.” Claim Construction Order at 38-41. The parties do not directly challenge this construction, but LGE argues that a genuine issue of material fact exists as to whether the accused method performed this step. LGE argues that the master latency timer (“MLT”) in defendants’ accused devices performs this step. MLTs count clock signals when an anchor node has possession of the bus. Defendants contend that although an MLT limits the time duration of bus access by a device, it does not count the number of accesses by the device. Defendants also contend that, in some instances, the MLTs continue counting when clock signals pass even if no access to the bus is taking place, such as during WAIT periods when no data is being placed on the bus.

LGE responds that the bus is accessed even during WAIT periods, regardless of whether any data is placed on the bus, because the device has access to the bus. LGE points out that the purpose of the invention is to eliminate “hogging” the bus, and that the bus is “being hogged” even during WAIT periods. Further, LGE argues that, under the trial court’s construction, a device still has “use of the bus” during a wait period. LGE points to the discussion in the ’733 patent relating to Figure 8. ’733 patent col. 21. In this preferred embodiment, the description includes a programmable node grant counter NGCNT 720. The description explains that when certain conditions are met, an enable count input is asserted and during a bus access cycle a transition of a clock signal causes NGCNT 720(1) to increment by one count. Therefore, when certain criteria are met, a clock signal can create an access count.

There is a genuine issue of material fact as to whether the accused devices count the number of accesses. See Ranbaxy Pharms., Inc. v. Apotex, Inc., 350 F.3d 1235, 1240 (Fed. Cir. 2003) (“Infringement, both literal and under the doctrine of equivalents, is a question of fact.” (citing Insituform Techs., Inc. v. Cat Contracting, Inc., 161 F.3d 688, 692 (Fed. Cir. 1998))). The central issue is whether the bus is accessed on each clock signal so that the clock signals, in effect, count the number of accesses to the bus. The trial court agreed that LGE’s argument is consistent with its claim construction, but found that it failed to present evidence supporting its position. To the contrary LGE presented sufficient expert testimony on this issue to avoid summary judgment. LGE’s expert testified that some type of signal is asserted with each clock signal, and, if proven, this would in effect make the MLTs count accesses. The summary judgment is vacated. VI. ’641 patent

The ’641 patent discloses a system for ensuring that the most current data is retrieved from the main memory. Because individual devices can update data in their own local cache memory without immediately writing the new data back to the main memory, data in the main memory can be “stale.” Therefore, the system claimed in the ’641 patent monitors the data being transferred over the bus, and if data stored in the cache matches the address of the data being transferred, a hold signal is asserted. Then, the data being transferred is compared with the data on the cache. If there is a difference, the data stored on the cache, which is the most recent data, is also transferred.

The trial court concluded the ’641 patent claims asserted were not infringed based on its patent exhaustion holding, which we reverse above. However, LGE contends that the trial court also improperly construed claims 1, 5, and 14. In particular, LGE disputes the trial court’s construction of “cache memory means” (in claims 1 and 5) and “cache memory” (in claim 14), which were construed as “one of at least two high speed memories located close to the CPU of a computer to give the CPU faster access to blocks of data than could be taken directly from the larger, slower main memory and never using valid/invalid bits.” Claim Construction Order at 18-22. LGE contends that the trial court improperly read claims 1 and 14 as requiring at least two caches. It also contends that the trial court improperly read in the limitation that neither cache uses valid/invalid bits.

We agree with LGE that the trial court erred in reading the limitation of at least two high speed memories into claims 1 and 14. Unlike claim 5, which expressly requires at least two cache memory means, claims 1 and 14 have no such express limitation. Cf. Phillips, 415 F.3d at 1314 (“Differences among claims can also be a useful guide in understanding the meaning of particular claim terms.” (citing Laitram Corp. v. Rexnord, Inc., 939 F.2d 1533, 1538 (Fed. Cir. 1991))). To the contrary, claims 1 and 14 only require one or more CPUs and a cache memory coupled between the CPU and the bus. Because the claims expressly cover one central processing unit, they logically also cover systems with only one cache coupled between that single central processing unit and the bus. Defendants rely on the fact that the written description describes a system with multiple caches. However, as we explain in more detail below, the patent application initially described two inventions, and these statements relate to the other invention that is not claimed in the ’641 patent.

We also agree with LGE that the trial court improperly read the limitation of never using valid/invalid bits into the claims. The patent’s background section suggests that valid/invalid bits were used to manage data in systems with more than one cache. In particular, it explains that the purpose of the invalid bit is to redirect a processor attempting to access an address in its cache to another cache with a more updated memory associated with that address. ’641 patent col. 1 ll. 44-52. The claims at issue do not themselves expressly include or exclude the use of valid/invalid bits. Defendants, however, contend that the trial court’s construction is supported by the specification and prosecution history. The specification states that “a further object of this invention [is] to provide a cache memory system wherein the use of valid/invalid data indicators are avoided.” ’641 patent col. 1 ll. 65-67. It further states that “[i]t should be kept in mind during the following description, that the invention maintains data integrity by assuring that cache data is always the most up-to-date in the system. Thus, there never is a ‘valid’ or ‘invalid’ indication with respect to any cache data as it is always assured that if data is provided by a cache, that it invariably is valid (i.e. most up-to-date).” Id. col. 3 ll. 27-33.

Defendants are correct that reviewing the specification in construing claims is appropriate, Phillips, 415 F.3d at 1315-17, but such review need not be done in the abstract. Here, as noted above, the original patent application disclosed two inventions. As the examiner observed, one invention was “drawn to a cache system for updating each copy of the data stored in a plurality of caches when the data is modified,” and the other was drawn to “a cache system for sending the most current data to a requestor by monitoring the address of a data on a data bus for detecting whether the [data] is stored and modified in the cache.” The patent examiner concluded that these two inventions were distinct and required the applicant to elect one invention. The applicant ultimately limited the original application to the latter group of claims, which issued as the ’641 patent, and the other claim group was separated into a different application, which ultimately issued as U.S. Patent No. 5,097,409.

Here, the discussion of valid/invalid bits in the specification was relevant to multi- cache systems, because the patent’s background provides that “[s]o long as a write back cache is utilized with only one processor, data management is straight forward. However, when more than one central processor uses the same main memory, data management problems multiply.” ’641 patent col. 1 ll. 39-43. The patent explains that the data management problems in multiple CPU systems are a result, at least in part, of their containing more than one cache memory. Managing data in multiple cache systems was the subject of the invention not elected during prosecution and, therefore, the statements in the specification referring to valid/invalid bits are not relevant to the invention ultimately claimed in the ’641 patent. Cf. Pitney Bowes, Inc. v. Hewlett- Packard Co., 182 F.3d 1298, 1311 (Fed. Cir. 1999) (observing that a written description describing multiple inventions may not be relevant “in toto” to each of those inventions). Indeed, the unelected claims expressly contained the limitation that the “cache memory means hav[e] no provisions for indicating the invalidity of said data units,” whereas the elected claims contained no such limitation.

For the same reasons, we do not find that the patentee disavowed the use of valid/invalid bits under the doctrine of specification disclaimer. “[T]he specification may reveal an intentional disclaimer, or disavowal, of claim scope by an inventor. In that instance, . . . the inventor has dictated the correct claim scope, and the inventor’s intention, as expressed in the specification, is regarded as dispositive.” Phillips, at 1316; see also SciMed Life Sys. v. Advanced Cardiovascular Sys., 242 F.3d 1337, 1341 (Fed. Cir. 2001). However, because the statements relied upon by defendants relate to the invention not elected during prosecution, there is no clear disavowal with respect to the invention actually claimed in the ’641 patent. VII. ’379 patent

Like the ’641 patent, the ’379 patent claims a system and method for ensuring that the most current data, as opposed to “stale” data, is retrieved from memory. The claimed invention relates to how a memory controller coordinates requests to read data from the memory and requests to write data to the memory. Generally, when a read request is asserted that corresponds to a buffered write request, the write request must go first to ensure that what is read from memory is the most current data. The invention disclosed in the ’379 patent does this by comparing the address of each read request to the buffered write requests, noting any matches, halting read execution when there is a match, and executing the buffered write requests.

LGE contends that the trial court erred in construing system claims 1 and 23 as requiring all write requests to be executed after a match is detected, as opposed to executing any number of write requests until the write request corresponding to the matching read request is executed. We agree. The claim language does not require all write requests to be executed after a match is detected. Moreover, claim 2, which depends from claim 1, expressly requires the execution of all write requests, as does independent method claim 7. See Phillips, 415 F.3d at 1314 (recognizing the utility of claim differentiation). In addition, the claim limitation at issue is written in means-plus function-claim language (“means for . . . causing an execution of buffered write requests”). Because the recited function is clear on its face, it was improper to incorporate the additional functional limitation of executing “all” buffered write requests. Smiths Indus. Med. Sys., Inc. v. Vital Signs, Inc., 183 F.3d 1347, 1357 (Fed. Cir. 1999); see also Wenger Mfg., Inc. v. Coating Mach. Sys., Inc., 239 F.3d 1225, 1233 (Fed. Cir. 2001) (“[A] court may not import functional limitations that are not recited in the claim . . . .”).

LGE also disputes the trial court’s grant of summary judgment of noninfringment of method claim 7. [5] This claim explicitly requires the step of buffering “each” read request and then comparing that read request to the buffered write addresses. If the read request matches a write request, then the claim provides for the following steps: executing all buffered read requests up to the matching request; then executing “all buffered write requests;” and then executing the matching read request. If, however, the comparison of the read request does not yield a match to a buffered write request, then all read requests are executed. Defendants contend, and LGE does not appear to dispute, that the accused devices do not operate in this manner. Instead, they contend that when a buffered read request matches a buffered write request, their devices do not execute “all” write requests before executing the matching read request, but instead only execute the write requests up to the one matching the read request, and then execute the matching read request.

The trial court concluded, and we agree, that there was no literal infringement of this claim. The claimed method requires handling each read address in one of two ways depending on whether the read request matches a write request. The second way, which applies when the pending read request matches a pending write request, is to execute all write requests before executing the read request. LGE contends that when the matching write request happens to be the last in the buffer, all write requests are in fact executed before the matching read request. Although LGE correctly asserts that any practice of the claimed method would be infringement, Bell Commc’ns Research, Inc. v. Vitalink Commc’ns Corp., 55 F.3d 615, 622 (Fed. Cir. 1995), the claim

which was determined to be within the predetermined range;

then executing all buffered write requests; and then executing the buffered read request which

was determined to be within the predetermined range. must be considered in its entirety. Here, the claim requires each read request to be compared with the buffered write requests, and then one of two alternatives be followed. Because the claim was drafted with this limitation, the fact that the accused device occasionally operates in such a manner does not amount to literal infringement of claim 7. For infringement to be found, the claim requires the accused device to operate in this manner in response to “each” read request.

The trial court also found, as a matter of law, that there was no infringement under the doctrine of equivalents. In doing so, it rejected LGE’s argument that performing all of the write requests up to (and including) the one matching the read request is an insubstantial difference from the claim limitation of performing all write requests before executing the incoming read request. The trial court reasoned that LGE’s equivalence theory would vitiate the claim limitation of performing “all” write requests before an incoming read request matching a write request.

The doctrine of equivalents operates under the “all limitations rule,” whereby “equivalence [is] assessed on a limitation-by-limitation basis, as opposed to from the perspective of the invention as a whole.” Freedman Seating Co. v. Am. Seating Co., 420 F.3d 1350, 1358 (Fed. Cir. 2005) (citing Warner-Jenkinson Co. v. Hilton Davis Chem. Co., 520 U.S. 17, 29 (1997)). This doctrine, by its very nature, extends beyond the patent’s literal claim scope, because otherwise a finding of no literal infringement would be a foreordained conclusion of no infringement at all. Ethicon Endo-Surgery v. U.S. Surgical Corp., 149 F.3d 1309, 1317 (Fed. Cir. 1998). At the same time, however, “[i]f our case law on the doctrine of equivalents makes anything clear, it is that all claim limitations are not entitled to an equal scope of equivalents.” Moore U.S.A., Inc. v. Standard Register Co., 229 F.3d 1091, 1106 (Fed. Cir. 2000).

“There is no set formula for determining whether a finding of equivalence would vitiate a claim limitation, and thereby violate the all limitations rule. Rather, courts must consider the totality of the circumstances of each case and determine whether the alleged equivalent can be fairly characterized as an insubstantial change from the claimed subject matter without rendering the pertinent limitation meaningless.” Freedman Seating Co., 420 F.3d at 1359 (citations omitted). LGE contends that performing some of the write requests is a permissible equivalent to performing all write requests, and that while performing no write requests may vitiate the claim language, performing some does not. As discussed above, there is inevitably a range of equivalents for performing all write requests, even if that range is narrow. See Ethicon Endo-Surgery, 149 F.3d at 1317. If substantially all or nearly all write requests are performed by the accused devices before each matching read request, then the doctrine of equivalents would be fully applicable without vitiating the claim language. Although such scope would be outside of the claim’s literal scope, which is true in any doctrine of equivalents analysis, it would not be inconsistent with the language of the claim. Therefore, a genuine issue of material fact exists as to whether the accused device can function within the narrow range of equivalents that we have described above, and we vacate the trial court’s grant of summary judgment of noninfringement on this ground.

Conclusion Accordingly, the judgment of the United States District Court for the Northern District of California is affirmed in-part, reversed in-part, and vacated in-part. The case is remanded for further proceedings in accordance with this opinion.

COSTS

LGE shall have its costs.

AFFIRMED-IN-PART, REVERSED-IN-PART, VACATED-IN-PART, AND REMANDED

NOTES

[1] First International Computer, Inc.; First International Computer of America, Inc.; Q-Lity Computer, Inc.; Quanta Computer, Inc.; and Quanta Computer USA, Inc. are the defendants challenging the trial court’s implied license ruling.

[2] The relevant contract provision provides: {As partial consideration for the rights granted to [[LGE] under the License Agreement(s), [LGE] agrees not to (A) sue, or (B) bring, prosecute, assist or participate in any judicial, administrative or other proceedings of any kind against [Microsoft], its Suppliers, their subsidiaries, or their licensees (including without limitation [original equipment manufacturer] customers and end users) for infringement of [LGE’s] Patents . . . which occurs during the Immunity period . . . on account of the manufacture, use, sale, or distribution of . . . [the product’s licensed to LGE by Microsoft].}

[3] The specification provides: Although the method and apparatus of the invention will be described herein in the context of a Multibus II environment, it should be appreciated that the invention may be practiced in many digital computer systems having a bus for transferring data between at least two agents interconnected upon the bus. The operating characteristics of the Multibus II are described in a document entitled “High

[4] Claim 15, the only independent claim at issue, provides: A method for determining priority of access to a bus among a set of devices coupled to the bus, each device being represented for priority purposes by a node in a group of nodes and each node having a priority relative to a single node currently having the highest priority, the method comprising the steps of: receiving an access request in a node from a represented device; determining whether any node with a higher priority has received an access request; if no such node has received an access request, permitting the device to access the bus; counting a number of accesses by the device to the bus; and in response to predetermined number of accesses to the bus, giving another node the highest priority.

[5] Claim 7 provides: In an information processing system having a system bus for coupling together a plurality of bus connections, one of the bus connections being a memory control unit coupled to one or more memory units, the memory control unit being responsive to address and data signal lines of the system bus for writing information units to and for reading information units from the memory units, a method of reading and writing the information units comprising the steps of: buffering write requests, including write addresses, as they are received from the system bus; buffering read requests, including read addresses, as they are received from the system bus; comparing when received each read address against buffered write addresses, if any, to determine if a received read address has an address value within a predetermined range of address values of a buffered write address; if a received address is determined not to be within the predetermined range of addresses of any buffered write addresses then: first executing in sequence all buffered read requests; and then executing in sequence all buffered write requests; else if a received address is determined to have an address value within the predetermined range of address values of any buffered write address: first executing in sequence all buffered read requests up to but not including the received read request

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