852 F.2d 1292 | Fed. Cir. | 1988
Unpublished Disposition
NOTICE: Federal Circuit Local Rule 47.8(b) states that opinions and orders which are designated as not citable as precedent shall not be employed or cited as precedent. This does not preclude assertion of issues of claim preclusion, issue preclusion, judicial estoppel, law of the case or the like based on a decision of the Court rendered in a nonprecedential opinion or order.
In re Gilbert P. HYATT.
No. 87-1597.
United States Court of Appeals, Federal Circuit.
June 9, 1988.
Before RICH, DAVIS and NIES, Circuit Judges.
PER CURIAM.
DECISION
Gilbert P. Hyatt appeals, pro se, from the decision of the United States Patent and Trademark Office (PTO) Board of Patent Appeals and Interferences (Board), affirming the examiner's final rejection of all claims of his application, Serial No. 860,253. We affirm the decision of the Board rejecting all claims under 35 U.S.C. Sec. 112, First Paragraph ("Sec. 112-1"), for lack of enablement.
OPINION
The subject matter claimed by appellant is a stored program data processor, i.e., a computer, implemented on a single integrated circuit chip. The Board affirmed the examiner's rejection of all claims under 35 U.S.C. Sec. 112-1, based on the failure of the disclosure in the specification to enable one skilled in the integrated circuit art to make a computer on a single chip. The Board also affirmed the examiner's alternative rejections of most claims under 35 U.S.C. Sec. 103. This rejection was based on the view that when the claims are given their broadest reasonable interpretation they read on a particular single chip arithmetic unit found in the prior art.
I. Enablement
Appellant's application is a continuation-in-part of application Serial No. 101,881 which was filed on December 28, 1970. The PTO does not dispute that appellant is entitled to that filing date. The end of 1970 is thus the relevant time for evaluating the questions of enablement and obviousness. Stored program data processors on single chips, now called microprocessors, are used today for a wide variety of applications. There is no question that the claimed invention can be built today.
The legal question, however, is whether the disclosure in appellant's application would have enabled a person of ordinary skill in the integrated circuit are to make appellant's invention around December 1970. In re Glass, 492 F.2d 1228, 1232, 181 U.S.P.Q. (BNA) 31, 34 (CCPA 1974). "Because the filing date is so important in determining patent rights, it is essential that there be no question that, at the time an application for patent is filed, the invention claimed therein is fully capable of being reduced to practice (i.e. that no technological problems, the resolution of which would require more than ordinary skill and reasonable time, remain in order to obtain an operative, useful embodiment." In re Argoudelis, 434 F.2d 1390, 1395, 168 U.S.P.Q. (BNA) 99, 104 (CCPA 1970) (Baldwin, J., concurring) (emphasis in original). See also In re Hawkins, 486 F.2d 569, 574-75, 179 U.S.P.Q. (BNA) 157, 161 (CCPA 1973). "This effectively prevents applicants from patenting pipedreams." Id. at 575, 179 USPQ at 162.
The specification states that "[t]his monolithic data processor can be implemented on a single integrated circuit chip ..." and that "[m]icrocomputer architecture is provided that facilitates a fully integrated circuit computer on a single integrated circuit chip (empahses added)." Logical equations for the computer are presented, but the specification says nothing more about how to construct the inventor's architecture on a silicon chip. Appellant relies entirely on the general state of the prior art. He contends that the level of knowledge in the integrated circuit art in 1970 was such that one of ordinary skill could build such a chip without undue experimentation. He says that once logical equations are provided, masks for making large scale integrated circuits could be generated routinely and automatically by computer programs.
The examiner challenged the applicant's assertions concerning the level of skill in the art in December, 1970. He cited references tending to show that although there was a trend for the design and construction of larger and larger integrated circuits, the art during the critical period faced unsolved technical problems. Single chip integrated circuits of the size and complexity required by the claimed invention had not been achieved by anyone, let alone by those of only ordinary skill in the art. The examiner therefore rejected the claims as not enabled by the specification. The question on review is whether appellant Hyatt has successfully rebutted the examiner's argument that the disclosure would not have enabled one having ordinary skill to construct appellant's computer on a single chip in December 1970.
We review the question of whether a disclosure is enabling for purposes of 35 U.S.C. Sec. 112-1, as a matter of law. Raytheon Co. v. Roper Corp., 724 F.2d 951, 960 n. 6, 220 U.S.P.Q. (BNA) 592, 599 n. 6 (Fed.Cir.1983), cert. denied, 469 U.S. 835 (1984). However, enablement may (as it does here) involve subsidiary questions of fact. Quaker City Gear Works, Inc. v. Skil Corp., 747 F.2d 1446, 1453-54, 223 U.S.P.Q. (BNA) 1161, 1166 (Fed.Cir.1984), cert. denied, 471 U.S. 1136 (1985). Under 35 U.S.C. Sec. 112-1, a disclosure must be sufficiently complete to enable one of ordinary skill in the art to make the invention without undue experimentation. Martin v. Johnson, 454 F.2d 746, 751, 172 U.S.P.Q. (BNA) 391, 395 (CCPA 1972). However, Sec. 112-1 does not require that the specification contain what is well known to those skilled in the art. Id.; Lindemann Maschinenfabrik GMBH v. American Hoist & Derrick Co., 730 F.2d 1452, 1463, 221 U.S.P.Q. (BNA) 481, 489 (Fed.Cir.1984).
In order to reject a claim for lack of enablement, the examiner has the initial burden of producing reasons that substantiate the rejection. In re Marzocchi, 439 F.2d 220, 223-24, 169 U.S.P.Q. (BNA) 367, 369-70 (CCPA 1971). Once that is done, the burden shifts to the applicant to rebut this conclusion by presenting evidence to prove that the disclosure in the specification is enabling. In re Eynde, 480 F.2d 1364, 1370, 178 U.S.P.Q. (BNA) 470, 474 (CCPA 1973). Materials submitted to prove enablement must be factual evidence such as patents, publications, and affidavits. Id.; 37 C.F.R. 1.132. Mere argument and conclusory allegations are insufficient.
Here the examiner raised substantial questions concerning enablement and provided references supporting his position. This was sufficient to support the rejection for lack of enablement. The burden then shifted to the applicant to offer factual evidence sufficient to overcome the examiner's reasonable prima facie case of nonenablement. He failed to meet this burden.
Appellant has offered various arguments concerning enablement. Some are attacks on specific wording in the Board decision or Solicitor's brief. Some arguments concern issues that are relevant but not in dispute.* Most of his argument consists of conclusory statements reiterating his position that because the level of art was high in 1970, the logical equations provided in the disclosure were all that was needed for the routineer to make his chip. The dispositive factor is that he offers little evidence to back up these assertions, and what little evidence he presents is troubling. Appellant quotes statements from references (Phillips, Farina, Hudson) that are not in the record before this court. We are unable to consult those references to determine whether these excerpts in context support appellant's position. Appellant repeatedly cites Figure 3 of the Rudenberg article (cited by the examiner and in the record) for the proposition that in 1970 the skill in the art could place 10,000 transistors on a single chip. What Figure 3 actually shows is quite different: it is a prediction made in 1969, based on extrapolation of past trends, that by 1970 researchers in the laboratory would be able to place 10,000 transistors on a single chip. This forecast is a far cry from proving that those of ordinary skill were actually able to do so in 1970. And it is even further removed to contend that the routineer, provided only with logical diagrams and equations, could make appellant's claimed single chip computer.
Appellant also asks this court to take judicial notice of the advanced state of the integrated circuit art. "The facts constituting the state of the art are normally subject to the possibility of rational disagreement among reasonable men and are not amenable to the taking of such notice." Eynde, 480 F.2d at 1370, 178 USPQ at 474.
Appellant appears to misunderstand the responsibilities and burdens of persuasion placed on the applicant for a patent. An inventor may apply for a patent without any actual reduction to practice. Dolbear v. American Bell Tel. Co., 126 U.S. 1, 535-36 (1888). However, whenever the examiner raises reasonable questions about the adequacy of the disclosure, it is incumbent on the applicant to provide evidence that adequately rebuts these concerns. This obligation to produce factual support occurs in many contexts in patent prosecution, such as challenges to the operability of an invention, Fregeau v. Mossinghoff, 776 F.2d 1034, 1038, 227 U.S.P.Q. (BNA) 848, 852 (Fed.Cir.1985), and when questions are raised about the identity of the product in a product-by-process claim. In re Marosi, 710 F.2d 799, 803, 218 U.S.P.Q. (BNA) 289, 292-93 (Fed.Cir.1983). See 37 C.F.R. Sec. 1.132. It undoubtedly applies when the applicant relies for enablement on what was known in the art and the examiner raises reasonable questions as to what was actually within the ordinary skill in the art.
The tradeoff for relying on skill in the art instead of explicitly disclosing information is the obligation to be able to prove with facts what was well known in the art. If the appellant's contentions concerning the level of skill in the art were correct, then there should have been many kinds of evidence available to bolster his case. The record shows that appellant is an expert who could be expected to have easy access to information about the integrated circuit art around December 1970. But the factual evidence offered by the appellant is meager. Given the factual record before the Board, there is no error in the Board's conclusion that appellant's disclosure would not have been enabling.
The decision of the Board is based on the overall failure of the appellant to produce sufficient evidence to rebut the examiner's challenge. As an example of one technical problem that appellant had failed to address, the Board discussed "the pin problem" in detail. The references cited by the examiner documented that one of the unsolved problems that impeded the development of large scale integrated circuits during the relevant time period was a limitation on the number of leads or pins for input and output that could be placed on a single chip. Quite belatedly, in his Reply Brief, appellant directly addressed that problem and stated that his disclosed computer could be implemented on a single chip with only 34 pins, and that chips with more than 34 pins were well within the capabilities of the art. This is an example of an argument that should have been raised much earlier in the prosecution. It is somewhat disingenuous for appellant to claim that "[t]his pin issue was never raised by the Examiner. Hence, appellant had no opportunity to submit affidavits directed to this pin problem" (emphasis in original) and that "[t]he first hint of the pin problem issue appeared in the decision by the Board on appeal." The references originally cited by the examiner put appellant on notice that this was one of several problems that raised concerns about enablement. Proof that appellant's design was not pin limited should have been presented earlier when it could have been evaluated by the expertise in the PTO. This court is unable to determine confidently whether appellant has fully rebutted the argument that his disclosure is not enabling because it failed to solve the pin problem. For purposes of this appeal, we will assume that Hyatt has successfully rebutted this objection.
Nevertheless, the Board's opinion was not based solely on the pin problem, and our affirmation of the Board's opinion does not depend on this issue. Appellant has not come close to presenting sufficient evidence to make a persuasive case that a routineer in the integrated circuit art in 1970, presented with appellant's disclosure and supplementing it with what was well known in the art, could have implemented appellant's computer on a single chip without undue experimentation. A key deficiency, although not the only one, is appellant's failure to present sufficient evidence proving that in 1970 logical equations provided sufficient disclosure to enable one of ordinary skill, whether assisted by computer programs or not, to make an operable embodiment of the claimed computer on a single LSI chip.
II. Obviousness
Certain claims were also rejected under 35 U.S.C. Sec. 103. The basis for this rejection was the view that the claims would have been obvious in light of particular prior art, namely, the arithmetic unit of the RCA LIMAC computer disclosed in the references of Miller, Beelitz and Levy. The examiner apparently viewed the arithmetic unit as a single integrated circuit chip that served as a data processor, albeit with very limited capabilities. The Sec. 103 rejection derives much of its persuasiveness from the assumption that the arithmetic unit was actually implemented on a single chip. Belatedly, in his Reply Brief, appellant points out that the LIMAC arithmetic unit was not a single chip. The Miller patent, United States Patent No. 3,462,742, states:
Since 1200 gates is too large a number of gates to expect in a single integrated circuit array in the present state of the manufacturing art, the arithmetic unit AU is shown in FIG. 2 as divided by dashed lines into four parts each intended to be constituted on a single integrated circuit.... In this way each partitioned part of the arithmetic unit can be fabricated on a respective integrated circuit array having a sufficiently large number of gates together with a sufficiently small number of terminals for connections with system buses and local buses.
Col. 7, lines 20-39.
The only thing pointing toward the use of a single chip is a general statement in the Abstract that "[e]ach partitioned unit is preferably fabricated in the form of a single integrated circuit array." We have not found any information in the remaining references cited indicating that the arithmetic unit was ever fabricated on a single chip.
The implications for obviousness if the arithmetic unit were not a single chip were not analyzed by the examiner, the Board, or the Solicitor in the Respondent's brief submitted to this court. All discussions about the Sec. 103 rejections centered on other issues, and give the impression that all parties assumed that the arithmetic unit had been reduced to practice on a single chip. If, as it appears, the arithmetic unit was never implemented on a single chip in the relevant time period, then whether the cited references still would have rendered appellant's claims obvious to one of ordinary skill in the art has not been adequately briefed to this court. Since all claims have been rejected under 35 U.S.C. Sec. 112-1, it is unnecessary to consider further the obviousness rejection. It is also unnecessary to resolve the question of whether the rejections for obviousness and lack of enablement were inconsistent.
For example, he points out that technology existed for the placing of thousands of transistors on single wafers. If this fact were not true it would doom his overall argument, so he is not to be faulted for mentioning it. However, the PTO readily concedes that this fact is true and that this was routinely done for the production of multiple isolated chips using a single wafer. The critical issue is whether, based on the appellant's disclosure, transistors could have been placed on a single chip in 1970 interconnected into a functioning large scale integrated circuit that would operate as his claimed invention
